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Texas Instruments /TM4C123GE6PM /SYSCTL /DC7

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Interpret as DC7

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCTL_DC7_DMACH0)SYSCTL_DC7_DMACH0 0 (SYSCTL_DC7_DMACH1)SYSCTL_DC7_DMACH1 0 (SYSCTL_DC7_DMACH2)SYSCTL_DC7_DMACH2 0 (SYSCTL_DC7_DMACH3)SYSCTL_DC7_DMACH3 0 (SYSCTL_DC7_DMACH4)SYSCTL_DC7_DMACH4 0 (SYSCTL_DC7_DMACH5)SYSCTL_DC7_DMACH5 0 (SYSCTL_DC7_DMACH6)SYSCTL_DC7_DMACH6 0 (SYSCTL_DC7_DMACH7)SYSCTL_DC7_DMACH7 0 (SYSCTL_DC7_DMACH8)SYSCTL_DC7_DMACH8 0 (SYSCTL_DC7_DMACH9)SYSCTL_DC7_DMACH9 0 (SYSCTL_DC7_DMACH10)SYSCTL_DC7_DMACH10 0 (SYSCTL_DC7_DMACH11)SYSCTL_DC7_DMACH11 0 (SYSCTL_DC7_DMACH12)SYSCTL_DC7_DMACH12 0 (SYSCTL_DC7_DMACH13)SYSCTL_DC7_DMACH13 0 (SYSCTL_DC7_DMACH14)SYSCTL_DC7_DMACH14 0 (SYSCTL_DC7_DMACH15)SYSCTL_DC7_DMACH15 0 (SYSCTL_DC7_DMACH16)SYSCTL_DC7_DMACH16 0 (SYSCTL_DC7_DMACH17)SYSCTL_DC7_DMACH17 0 (SYSCTL_DC7_DMACH18)SYSCTL_DC7_DMACH18 0 (SYSCTL_DC7_DMACH19)SYSCTL_DC7_DMACH19 0 (SYSCTL_DC7_DMACH20)SYSCTL_DC7_DMACH20 0 (SYSCTL_DC7_DMACH21)SYSCTL_DC7_DMACH21 0 (SYSCTL_DC7_DMACH22)SYSCTL_DC7_DMACH22 0 (SYSCTL_DC7_DMACH23)SYSCTL_DC7_DMACH23 0 (SYSCTL_DC7_DMACH24)SYSCTL_DC7_DMACH24 0 (SYSCTL_DC7_DMACH25)SYSCTL_DC7_DMACH25 0 (SYSCTL_DC7_DMACH26)SYSCTL_DC7_DMACH26 0 (SYSCTL_DC7_DMACH27)SYSCTL_DC7_DMACH27 0 (SYSCTL_DC7_DMACH28)SYSCTL_DC7_DMACH28 0 (SYSCTL_DC7_DMACH29)SYSCTL_DC7_DMACH29 0 (SYSCTL_DC7_DMACH30)SYSCTL_DC7_DMACH30

Description

Device Capabilities 7

Fields

SYSCTL_DC7_DMACH0

USB_EP1_RX / UART2_RX
SYSCTL_DC7_DMACH1

USB_EP1_TX / UART2_TX
SYSCTL_DC7_DMACH2

USB_EP2_RX / Timer3A
SYSCTL_DC7_DMACH3

USB_EP2_TX / Timer3B
SYSCTL_DC7_DMACH4

USB_EP3_RX / Timer2A
SYSCTL_DC7_DMACH5

USB_EP3_TX / Timer2B
SYSCTL_DC7_DMACH6

ETH_RX / Timer2A
SYSCTL_DC7_DMACH7

ETH_TX / Timer2B
SYSCTL_DC7_DMACH8

UART0_RX / UART1_RX
SYSCTL_DC7_DMACH9

UART0_TX / UART1_TX
SYSCTL_DC7_DMACH10

SSI0_RX / SSI1_RX
SYSCTL_DC7_DMACH11

SSI0_TX / SSI1_TX
SYSCTL_DC7_DMACH12

CAN0_RX / UART2_RX
SYSCTL_DC7_DMACH13

CAN0_TX / UART2_TX
SYSCTL_DC7_DMACH14

ADC0_SS0 / Timer2A
SYSCTL_DC7_DMACH15

ADC0_SS1 / Timer2B
SYSCTL_DC7_DMACH16

ADC0_SS2
SYSCTL_DC7_DMACH17

ADC0_SS3
SYSCTL_DC7_DMACH18

Timer0A / Timer1A
SYSCTL_DC7_DMACH19

Timer0B / Timer1B
SYSCTL_DC7_DMACH20

Timer1A / EPI0_NBRFIFO
SYSCTL_DC7_DMACH21

Timer1B / EPI0_WFIFO
SYSCTL_DC7_DMACH22

UART1_RX / CAN2_RX
SYSCTL_DC7_DMACH23

UART1_TX / CAN2_TX
SYSCTL_DC7_DMACH24

SSI1_RX / ADC1_SS0
SYSCTL_DC7_DMACH25

SSI1_TX / ADC1_SS1
SYSCTL_DC7_DMACH26

CAN1_RX / ADC1_SS2
SYSCTL_DC7_DMACH27

CAN1_TX / ADC1_SS3
SYSCTL_DC7_DMACH28

I2S0_RX / CAN1_RX
SYSCTL_DC7_DMACH29

I2S0_TX / CAN1_TX
SYSCTL_DC7_DMACH30

SW

Links

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Register License

Software License Agreement

Texas Instruments (TI) is supplying this software for use solely and exclusively on TI’s microcontroller products. The software is owned by TI and/or its suppliers, and is protected under applicable copyright laws. You may not combine this software with “viral” open-source software in order to form a larger program.

THIS SOFTWARE IS PROVIDED “AS IS” AND WITH ALL FAULTS. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data